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A computer control unit is the control unit that is a part of the computer processor. The control unit fetches internal instructions of programs from the main memory to the processor (computer) instruction register and, based on this register contents, generates control signals that supervise execution of these instructions. The control signals are distributed to all smaller and larger elements of the computer that participate in execution of instructions and need to be controlled. The control signals are usually transmitted by the part of the overall system bus called the control bus.
There are two types of control units in computers:
A general block diagram of the hardwired control unit is shown in the figure below.
Block diagram of a hardwired control unit of a computer
The name - hardwired control unit originates from the fact that a part of the control unit - the control signal generator, is hardwired. It means that the control signals that are necessary for instruction execution control are generated by specially designed hardware logical circuits, in which we can not modify the signal generation method without physical change (redesign) of the circuit structure.
Basic data for control signal generation are contained in the operation code (op code) of an instruction. The operation code is decoded in the instruction decoder. The instruction decoder constitutes (in general) a set of many decoders that decode different fields of the instruction op code. As a result, usually several output lines going out from the instruction decoder obtain active signal values. These lines are connected to the inputs of the matrix that generates control signals for executive units of the computer. This matrix implements logical combinations of the decoded signals from the instruction op code with the outputs from the matrix that generates signals representing consecutive control unit states and with signals coming from the outside of the processor, e.g. interrupt signals. The matrices are built in a similar way as programmable logical arrays (see Lecture III).
Control signals for an instruction execution have to be generated not in a single time point but during entire time interval that corresponds to the instruction execution cycle. Following the structure of this cycle, the appropriate sequence of internal states is organized in the control unit. A number of signals generated by the control signal generator matrix is sent back to inputs of the next control state generator matrix. This matrix combines these signals with the timing signals generated by the timing unit based on the rectangular patterns usually supplied by the quartz generator. When a new instruction arrives to the control unit, the control units is in the initial state of new instruction fetching. Instruction decoding makes the control unit enter the first state relating execution of the new instruction, which lasts as long as the timing signals and other input signals as flags and state information of the computer, remain unchanged. A change of any of the mentioned signals stimulates the change of the control unit state. This causes that a new respective input is generated for the control signal generator matrix. When an external signal appears, e.g. an interrupt, the control unit enters a next control state that is the state concerned with the reaction to this external signal, e.g. interrupt processing. The values of flags and state variables of the computer are used to select appropriate states for the instruction execution cycle. The last states in the cycle are control states that initiate fetching the next instruction of the program: sending the program counter content to the main memory address buffer register and next, reading the instruction word to the instruction register of the computer. When the current instruction is the stop instruction that ends program execution, the control unit enters an operating system state, in which it waits for a next user directive.
The block diagrams of microprogrammed control units are shown in next two figures. The basic difference between these unit structures and the structure of the hardwired control unit is the existence of the control store (microprogram memory) that is used for storing words containing encoded control signals necessary for instruction execution. In microprogrammed control units, subsequent instruction words are fetched into the instruction register in a usual way. However, the operation code of each instruction is not directly decoded to enable immediate control signal generation but it constitutes the initial address of a microprogram contained in the control store.
We will now discuss the functioning of the microprogrammed control unit with a single level control unit (see the block diagram below).
The instruction op code from the instruction register is sent to the control store address register. Based on this address, the first microinstruction of a microprogram that interprets execution of this instruction is read to the microinstruction register. This microinstruction contains in its operation part encoded control signals, usually as several bit fields. The fields are decoded in a set microinstruction field decoders. Besides the encode control signal fields, the microinstruction contains the address of the next microinstruction of the given instruction microprogram and a control field used to control activities of the microinstruction address generator. The last mentioned field determines the addressing mode (addressing operation) to be applied to the address embedded in the current microinstruction. In microinstructions with the conditional addressing mode, this address is modified with the use of the processor condition flags that represent the status of computations in the current program. The last microinstruction in the microprogram of a given instruction is the microinstruction that fetches the next instruction from the main memory to the instruction register.
Microprogrammed control unit with a single level control store
In a control unit with a two-level control store, besides the control memory for microinstructions, a nanoinstruction memory is included (see the figure below). In such control unit, microinstructions do not contain encoded control signals. The operation part of microinstructions contains the address of the word in the nanoinstruction memory, which contains encoded control signals. The nanoinstruction memory contains all combinations of control signals that appear in microprograms that interpret the complete instruction set of a given computer, written once in the form of nanoinstructions. In this way, redundant storing of the same operation parts of microinstructions is avoided. The microinstruction word in this case can be much shorter than with the single level control store. It gives a much smaller volume in bits of the microinstruction memory and, as a result, a much smaller volume of the entire control memory. The microinstruction memory contains the control for selection of consecutive microinstructions, while that control signals are generated at the basis of nanoinstructions. In nanoinstructions, control signals are frequently encoded using 1 bit/ 1 signal method that eliminates decoding. However, signal encoding in multi-bit fields that requests decoding is also possible.
Microprogrammed control unit with a two-level control store
Microprogrammed control units are frequently applied in the design of contemporary microprocessors. Microprocessors of INTEL x86 series (USA), used in personal computers of the IBM PC type, have microprogrammed control units with a single level control store. Microprocessors Motorola 68xxx series (USA), used for the design of Mackintosh personal computers of the Apple company, have microprogrammed control units with two-level control stores. Microprocessors of the RISC type, designed by DECAlpha, Hewlett-Packard, Compaq, SUN companies, have hardwired control units.
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